Specifications

      Reference

      Links

About
6800IDE is a freeware windows based IDE for Motorola's 6800/6811 processor. Designed for educational purposes, it includes an assembler and an emulator for the 6800/6811 with builtin debugging support such as user breakpoints, execution trace, internal register display and a Hex/Bin/Dec number convertor.

The 6800/6811 family of processors fueled the early home computing explosion and its derivatives were the processors of choice for many personal computers including Apple, Commodore64, Nintendo etc, and numerous gaming consoles. Its direct decendents are still widely used today as embedded processors.

The 6800/6811 is an 8 bit, dual accumulator processor with flexible memory addressing modes. Compared to other processors, it's compact, and highly orthogonal instruction set makes it easier to program.

Screen Shots


Development / Debug Mode


Output Display Mode


Programming Reference



Specifications
Memory Mapped IO Support
  • Data Input Ports
    • Keyboard data at port $FFF0,1
    • Mouse cursor X coordinate at port $FFF2
    • Mouse cursor Y coordinate at port $FFF3
  • Data Output
    • Display Buffer at $FB00 to $FF38
    • 20 lines of 54 characters

Interrupt Vectors

  • _RST @ 0xFFFE,F 
  • NMI @ 0xFFFC,D
  • SWI @ 0xFFFA,B
  • IRQ @ 0xFFF8,9

Execution Trace Support:

  • Current Program line Highlight
  • Current Memory Location Highlight

User Break point support:

  • Disabled
  • Program Line No.
  • PC Address value
  • SP Address value
  • X Register value
  • Accumulator A value
  • Accumulator B value
  • Memory location changed value

Number Base Conversion:

  • Hexadecimal <=> Decimal
  • Hexadecimal <=> Binary
  • Decimal <=> Binary

 

Introductory Tutorial



6800.pdf [Adobe Acrobat PDF - 604.55 KB]

 

Programming Reference

Assembly statements contain the following fields:  [Label] Operation [operand] [comment] 
Label
Can be used to define a symbol, to skip the field use a blank or tab
Operation
Defines the opcode or directive. (Not case sensitive)
Operand
Contains an address or the data for the instruction. (Ignored with inherent addressing)
Comment
Used for software documentation can be at end or start of statement. 
Uses a semicolon to start the comment. 
Examples
label adda 3 ; comment here 
adda label 
clra              ; inherent address 
; this is a full line comment 

Assembler Directives 

Tag  Description  Example 
.org  Where to put code  .org $200
  .equ    Define Constant   .equ 100
.setw
 Preset memory word
 .setw $FFFE,10
  .rmb    Reserve Memory   .rmb 16
 .byte 
 Define Variable    .byte 64
 Array of bytes  .byte 1,2,3 
  .word   Define Variable   .word 5000 
 Array of words   .word 1,2,3 
.str   Define string   .str "text" 
.end   End of Program  .end 

Number Formats

Prefix  Description  Example 
  Decimal 320
Hex  $240
% Binary   %0110101
' Character   'm

Operand Formats

Format  Description  Examples  Mode 
  Inherent  CLRA  H
#<data> Immediate  LDDA #4 I
<data> Relative BRA 10 R
<data> Direct LDDA 4 D
<data> Extended LDDA label E
<data>,X Indexed  LDDA 4,X X


====================================================

Instruction Reference

====================================================
Status Flags
  •  -  unchanged
  •  *  updated
  •  1  set
  •  0  reset
H  I  N  Z  V  C
| | | | | |
| | | | | --- Carry-Borrow
| | | | ------ Overflow
| | | --------- Zero
| | ------------ Negative
| --------------- Interrupt Mask
------------------ Half Carry
Mnemonic  Operation 

Mode

Status

6800 Undocmented Instructions

HINZVC

HCF
  Halt and Catch Fire H

------

NBA
  AND Accumulators     [A <= A & B]
H

---**-

    Immediate Versions of STAA STAB STS etc

------

6811 Specific Instructructions

HINZVC

IDIV
  Integer Divide 16 x 16
H

---***

FDIV   Factional Divide 16x 16
H

---*0*

MUL
  16 multiply A x B 
H

------

DEY
  Decrement index reg Y  H

---*--

INY   increment index reg Y H

---*--

STY   Store Index reg. Y IDXE

--**0-

STD   Store composite reg. D 
IDXE

--**0-

LDY   Load index reg. Y 
IDXE

--**0-

LDD   Load composite reg. D   IDXE

--**0-

CPY   compare  index reg. Y   IDXE

--****

CPD   compare composite reg. D   IDXE

--****

ABX   Add acc.B to index reg.X 
H

------

ABY   Add acc.B to index reg.Y  H

------

PSHX   push index reg.X onto stack 
H

------

PSHY   push index reg.Y onto stack    H

------

PULX   pull index reg.X from stack    H

------

PULY   pull index reg.Y from stack  H

------

XGDX   exchange composite reg.D with X 
H

------

XGDY   exchange composite reg.D with Y  H

------

TSY   Transfer SP to index reg.Y 
H

------

TYS   Transfer index reg.Y to SP
H

------

ADDD   add using composite reg. D 
IDXE

--****

LSRD   logical shift right composite reg.D 
H

--0***

ASLD   arith. shift left composite reg.D  H

--****

Miscellaneous

HINZVC

NOP    No Operation   H

------

RTI    Return from Interrupt  [*not supported] H

******

RTS    Return from Subroutine   H

------

SWI    Software Interrupt [*not supported] H

-1----

WAI    Wait for Interrupt   H

-1----

Status Flags 

HINZVC

CLC   Clear Carry   H

-----0

CLV   Clear Overflow  H

----0-

CLI   Clear Interrupt Mask  H

-0----

SEC   Set Carry  H

-----1

SEV   Set Overflow   H

----1-

SEI   Set Interrupt Mask  H

-1----

TAP   Set Status Mask [Flags<-AccA]  H

******

TPA   Load Status Flags [AccA<-Flags]  H

------

 Branch and Jump

HINZVC

BRA   Branch Always   R

------

BCS   Branch if Carry Set [C=1]  R

------

BCC   Branch if Carry Clear [C=0]  R

------

BMI   Branch if Minus [N=1]  R

------

BPL   Branch if Plus [N=0]  R

------

BVS   Branch if Overflow Set [V=1]  R

------

BVC   Branch if Overflow Clear[V=0]  R

------

BEQ   Branch if Equal [Z=1]  R

------

BNE   Branch if Not Equal [Z=0]  R

------

BLT   Branch if < (signed)  R

------

BLE   Branch if <= (signed)  R

------

BGE   Branch if >= (signed)  R

------

BGT   Branch if > (signed)  R

------

BLS   Branch if Lower or Same (unsgn) R

------

BHI   Branch if Higher (unsigned)  R

------

BSR   Branch to Subroutine  R

------

JSR   Jump to Subroutine  E,X

------

JMP   Jump Absolute  E,X

------

Stack and Index 

HINZVC

CPX   Compare X   IDXE

---*--

DES   Decrement SP [SP <- SP - 1]   H

------

DEX   Decrement X [ X <- X - 1]  H

---*--

INS   Increment SP [SP <- SP + 1]  H

------

INX   Increment X [ X <- X + 1]  H

---*--

LDS   Load SP  IDXE

--**0-

LDX   Load X  IDXE

--**0-

STS   Store SP  DXE

--**0-

STX   Store X  DXE

--**0-

TSX   Transfer SP,X [X <= SP + 1]  H

------

TXS   Transfer X,SP [SP <= X - 1]  H

------

Accumulator Only
==> NEMz can be either NEMA or NEMB <==

HINZVC

ASLz   Arithmetic Shift Left Acc H

--****

ASRz   Arithmetic Shift Right Acc H

--****

LSRz   Logical Shift Right Acc H

--0***

ROLz   Rotate Left Acc H

--****

RORz   Rotate Right Acc H

--****

CLRz   Clear Accumulator   H

--0100

COMz   One's Complement  H

--**01

DECz   Decrement Acc [A <- A - 1]   H

--***-

INCz   Increment Acc [A <- A + 1]  H

--***-

NEGz   Negate Acc [A <- 0 - A]  H

--****

PSHz   Push Accumulator  H

------

PULz   Pull/Pop Accumulator  H

------

TSTz   Test Acc [A <- A - 0]  H

--**00

ABA   Add Accumulators [A <- A + B]  H

*-****

CBA   Compare Accumulators [A - B]  H

--****

DAA   Decimal Adjust Accumulator [*not supported] H

--****

SBA   Subtract Accumulators [A<-A-B]  H

--****

TAB   Transfer Accumulator [B <- A]  H

--**0-

TBA   Transfer Accumulator [A <- B]  H

--**0-

Memory Reference 
==> NEMz can be either NEMA or NEMB <==

HINZVC

LDAz   Load Accumulator [A <- M] IDXE

--**0-

STAz   Store Accumulator [M <- A] DXE

--**0-

ADCz   Add with Carry [A <- A+M+C] IDXE

*-****

ADDz    Add [A <- A+M]   IDXE

*-****

SBCz   Subtract w. Carry[A <- A-M-C]  IDXE

--****

SUBz   Subtract [A <- A-M] IDXE

--****

BITz    Bit Test [Z and M] IDXE

--**0-

ANDz   Logical AND [A <- A and M]  IDXE

--**0-

EORz   Exclusive OR [A <- A xor M]  IDXE

--**0-

ORAz   Inclusive OR [A <- A or M] IDXE

--**0-

CMPz   Compare Memory [A - M]  IDXE

--****

ASL   Arithmetic Shift Left   XE

--****

ASR   Arithmetic Shift Right   XE

--****

LSR   Logical Shift Right  XE 

--0***

ROL   Rotate Left Memory  XE 

--****

ROR   Rotate Right Memory  XE 

--****

CLR   Clear Memory [M <- 0]  XE

--0100

COM   Complement Memory[M <- !M]  XE

--**01

DEC   Decrement Memory [M <- M - 1]  XE

--***-

INC   Increment Memory [M <- M + 1]  XE

--***-

NEG  Negate Memory [M <- 0 - M]   XE

--****

TST   Test Memory [M - 0]  XE

--**00

 


Links


Additional resources on the 6800 can be found: